From 9cd234a423085233955d0075634af6a60416168b Mon Sep 17 00:00:00 2001 From: Dhruvin Rajpura Date: Wed, 19 Aug 2026 22:48:01 +0530 Subject: [PATCH 1/4] PENDING: dt-bindings: add PMAU0102 and PMM8650AU PMIC compatibles Add the qcom,pmau0102 and qcom,pmm8650au compatible strings to the SPMI PMIC binding, and the corresponding qcom,pmau0102-gpio and qcom,pmm8650au-gpio compatible strings to the PMIC GPIO binding, for the new PMICs used on Nord. Signed-off-by: Dhruvin Rajpura --- Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 2 ++ Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml | 2 ++ 2 files changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml index f6a4ee3a73d0e..492af382dbf64 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml @@ -74,6 +74,7 @@ properties: - qcom,pm8994 - qcom,pm8998 - qcom,pma8084 + - qcom,pmau0102 - qcom,pmc8180 - qcom,pmc8180c - qcom,pmc8380 @@ -95,6 +96,7 @@ properties: - qcom,pmk8550 - qcom,pmk8850 - qcom,pmm8155au + - qcom,pmm8650au - qcom,pmm8654au - qcom,pmp8074 - qcom,pmr735a diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml index b8109e6c2a109..88487d3db3847 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml @@ -57,6 +57,7 @@ properties: - qcom,pm8994-gpio - qcom,pm8998-gpio - qcom,pma8084-gpio + - qcom,pmau0102-gpio - qcom,pmc8180-gpio - qcom,pmc8180c-gpio - qcom,pmc8380-gpio @@ -75,6 +76,7 @@ properties: - qcom,pmk8550-gpio - qcom,pmk8850-gpio - qcom,pmm8155au-gpio + - qcom,pmm8650au-gpio - qcom,pmm8654au-gpio - qcom,pmp8074-gpio - qcom,pmr735a-gpio From 475f288ddc4e320c6f824a3366cfd165e6418530 Mon Sep 17 00:00:00 2001 From: Dhruvin Rajpura Date: Wed, 19 Aug 2026 22:49:01 +0530 Subject: [PATCH 2/4] PENDING: pinctrl: qcom: spmi-gpio: add PMAU0102 and PMM8650AU compatibles Add SPMI GPIO compatible strings for the PMAU0102 and PMM8650AU PMICs used on Nord, each with 12 GPIOs, so the driver can bind against the new per-chip PMIC dtsi nodes. Signed-off-by: Dhruvin Rajpura --- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c index cdd61dae74cf9..167b212961f3d 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c @@ -1274,7 +1274,9 @@ static const struct of_device_id pmic_gpio_of_match[] = { { .compatible = "qcom,pmk8350-gpio", .data = (void *) 4 }, { .compatible = "qcom,pmk8550-gpio", .data = (void *) 6 }, { .compatible = "qcom,pmk8850-gpio", .data = (void *)8 }, + { .compatible = "qcom,pmau0102-gpio", .data = (void *) 12 }, { .compatible = "qcom,pmm8155au-gpio", .data = (void *) 10 }, + { .compatible = "qcom,pmm8650au-gpio", .data = (void *) 12 }, { .compatible = "qcom,pmm8654au-gpio", .data = (void *) 12 }, /* pmp8074 has 12 GPIOs with holes on 1 and 12 */ { .compatible = "qcom,pmp8074-gpio", .data = (void *) 12 }, From bda3af5924335e8763cc4d75266dd1eccf1aaa14 Mon Sep 17 00:00:00 2001 From: Dhruvin Rajpura Date: Wed, 19 Aug 2026 22:50:25 +0530 Subject: [PATCH 3/4] PENDING: arm64: dts: qcom: nord: add PMAU0102 and PMM8650AU PMIC support PMAU0102 and PMM8650AU are new PMICs used on nord-rrd and nord-ride-sx that are not present on lemans/monaco, so there is no existing dtsi to reuse. Add per-chip PMIC dtsi files (pmau0102-nord.dtsi, pmm8650au-nord.dtsi) with their peripheral definitions, matching the hardware-per-file convention used for other PMICs. Update the spmi_bus controller node in nord.dtsi accordingly and include the new per-chip dtsi files from nord-embedded.dtsi, shared by both nord-rrd.dts and nord-ride-sx.dts. PMAU0102 instances (pmau0102_e through pmau0102_l) get gpio, adc and an MBG(Master Bandgap) temperature monitor wired to a DIE_TEMP ADC channel, using a new qcom,pmau0102-mbg-tm compatible with qcom,pm8775-mbg-tm as fallback. The PMM8650AU Kobra_MM instance (kobra_mm_a) gets pon, rtc, gpio and adc; apps does not have permission for its qcom,spmi-temp-alarm peripheral, so no thermal sensor is added for it. The PMM8650AU Kobra_PSAIL instance (kobra_psail_b) gets an MBG temperature monitor wired to kobra_mm_a's DIE_TEMP ADC channel, since Kobra_PSAIL has no ADC of its own. Signed-off-by: Dhruvin Rajpura --- .../bindings/thermal/qcom-spmi-mbg-tm.yaml | 6 +- arch/arm64/boot/dts/qcom/nord-embedded.dtsi | 2 + arch/arm64/boot/dts/qcom/nord-ride-sx.dts | 9 +- arch/arm64/boot/dts/qcom/nord.dtsi | 4 +- arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi | 534 ++++++++++++++++++ arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi | 118 ++++ 6 files changed, 666 insertions(+), 7 deletions(-) create mode 100644 arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi create mode 100644 arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi diff --git a/Documentation/devicetree/bindings/thermal/qcom-spmi-mbg-tm.yaml b/Documentation/devicetree/bindings/thermal/qcom-spmi-mbg-tm.yaml index a0ecc9f35cf6e..62e0b59e80a3a 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-spmi-mbg-tm.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-spmi-mbg-tm.yaml @@ -21,7 +21,11 @@ description: properties: compatible: - const: qcom,pm8775-mbg-tm + oneOf: + - const: qcom,pm8775-mbg-tm + - items: + - const: qcom,pmau0102-mbg-tm + - const: qcom,pm8775-mbg-tm reg: maxItems: 1 diff --git a/arch/arm64/boot/dts/qcom/nord-embedded.dtsi b/arch/arm64/boot/dts/qcom/nord-embedded.dtsi index 23698e07fe506..6aa12c1303606 100644 --- a/arch/arm64/boot/dts/qcom/nord-embedded.dtsi +++ b/arch/arm64/boot/dts/qcom/nord-embedded.dtsi @@ -20,6 +20,8 @@ #include #include "nord.dtsi" +#include "pmm8650au-nord.dtsi" +#include "pmau0102-nord.dtsi" / { clk_virt: interconnect-clk-virt { diff --git a/arch/arm64/boot/dts/qcom/nord-ride-sx.dts b/arch/arm64/boot/dts/qcom/nord-ride-sx.dts index 67422fa8cf1e2..ade395d07304b 100644 --- a/arch/arm64/boot/dts/qcom/nord-ride-sx.dts +++ b/arch/arm64/boot/dts/qcom/nord-ride-sx.dts @@ -9,7 +9,6 @@ #include #include "nord-embedded.dtsi" -#include "nord-pmics.dtsi" / { model = "Qualcomm Technologies, Inc. Nord Ride SX"; @@ -74,7 +73,7 @@ regulator-name = "usb2_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - gpio = <&pmic_h_gpios 3 GPIO_ACTIVE_HIGH>; + gpio = <&pmau0102_h_gpios 3 GPIO_ACTIVE_HIGH>; enable-active-high; regulator-always-on; }; @@ -533,7 +532,7 @@ vdd1v8-supply = <&vreg_l3l_1p8>; - reset-gpios = <&pmic_i_gpios 9 GPIO_ACTIVE_LOW>; + reset-gpios = <&pmau0102_i_gpios 9 GPIO_ACTIVE_LOW>; }; usb1_repeater: redriver@4f { @@ -543,7 +542,7 @@ vdd1v8-supply = <&vreg_l3l_1p8>; - reset-gpios = <&pmic_i_gpios 10 GPIO_ACTIVE_LOW>; + reset-gpios = <&pmau0102_i_gpios 10 GPIO_ACTIVE_LOW>; }; usb2_repeater: redriver@47 { @@ -553,7 +552,7 @@ vdd1v8-supply = <&vreg_l3l_1p8>; - reset-gpios = <&pmic_l_gpios 3 GPIO_ACTIVE_LOW>; + reset-gpios = <&pmau0102_l_gpios 3 GPIO_ACTIVE_LOW>; }; }; diff --git a/arch/arm64/boot/dts/qcom/nord.dtsi b/arch/arm64/boot/dts/qcom/nord.dtsi index b0affb7497504..3906bf79f6c9e 100644 --- a/arch/arm64/boot/dts/qcom/nord.dtsi +++ b/arch/arm64/boot/dts/qcom/nord.dtsi @@ -2261,15 +2261,17 @@ reg = <0x0 0x0c400000 0x0 0x3000>, <0x0 0x0c500000 0x0 0x400000>, <0x0 0x0c440000 0x0 0x80000>, - <0x0 0x0c4c0000 0x0 0x20000>, + <0x0 0x0c4c0000 0x0 0x10000>, <0x0 0x0c42d000 0x0 0x4000>; reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; + cell-index = <0>; qcom,channel = <0>; qcom,ee = <0>; + qcom,bus-id = <0>; interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "periph_irq"; interrupt-controller; diff --git a/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi b/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi new file mode 100644 index 0000000000000..426423b8ed011 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi @@ -0,0 +1,534 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include +#include "qcom-adc5-gen3.h" + +&spmi_bus { + pmau0102_e: pmic@4 { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0x4 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_e_mbg_temp: temperature-sensor@d700 { + compatible = "qcom,pmau0102-mbg-tm", "qcom,pm8775-mbg-tm"; + reg = <0xd700>; + interrupts-extended = <&spmi_bus 0x4 0xd7 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pmau0102_e_adc ADC5_GEN3_DIE_TEMP(4)>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmau0102_e_adc: adc@7200 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x7200>; + #address-cells = <1>; + #size-cells = <0>; + interrupts-extended = <&spmi_bus 0x4 0x72 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@400 { + reg = ; + label = "pmau0102_e_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@401 { + reg = ; + label = "pmau0102_e_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@403 { + reg = ; + label = "pmau0102_e_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + pmau0102_e_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_e_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_f: pmic@5 { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0x5 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_f_mbg_temp: temperature-sensor@d700 { + compatible = "qcom,pmau0102-mbg-tm", "qcom,pm8775-mbg-tm"; + reg = <0xd700>; + interrupts-extended = <&spmi_bus 0x5 0xd7 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pmau0102_f_adc ADC5_GEN3_DIE_TEMP(5)>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmau0102_f_adc: adc@7200 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x7200>; + #address-cells = <1>; + #size-cells = <0>; + interrupts-extended = <&spmi_bus 0x5 0x72 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@500 { + reg = ; + label = "pmau0102_f_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@501 { + reg = ; + label = "pmau0102_f_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@503 { + reg = ; + label = "pmau0102_f_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + pmau0102_f_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_f_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_g: pmic@6 { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0x6 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_g_mbg_temp: temperature-sensor@d700 { + compatible = "qcom,pmau0102-mbg-tm", "qcom,pm8775-mbg-tm"; + reg = <0xd700>; + interrupts-extended = <&spmi_bus 0x6 0xd7 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pmau0102_g_adc ADC5_GEN3_DIE_TEMP(6)>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmau0102_g_adc: adc@7200 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x7200>; + #address-cells = <1>; + #size-cells = <0>; + interrupts-extended = <&spmi_bus 0x6 0x72 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@600 { + reg = ; + label = "pmau0102_g_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@601 { + reg = ; + label = "pmau0102_g_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@603 { + reg = ; + label = "pmau0102_g_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + pmau0102_g_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_g_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_h: pmic@7 { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0x7 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_h_mbg_temp: temperature-sensor@d700 { + compatible = "qcom,pmau0102-mbg-tm", "qcom,pm8775-mbg-tm"; + reg = <0xd700>; + interrupts-extended = <&spmi_bus 0x7 0xd7 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pmau0102_h_adc ADC5_GEN3_DIE_TEMP(7)>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmau0102_h_adc: adc@7200 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x7200>; + #address-cells = <1>; + #size-cells = <0>; + interrupts-extended = <&spmi_bus 0x7 0x72 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@700 { + reg = ; + label = "pmau0102_h_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@701 { + reg = ; + label = "pmau0102_h_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@703 { + reg = ; + label = "pmau0102_h_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + pmau0102_h_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_h_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_i: pmic@8 { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0x8 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_i_mbg_temp: temperature-sensor@d700 { + compatible = "qcom,pmau0102-mbg-tm", "qcom,pm8775-mbg-tm"; + reg = <0xd700>; + interrupts-extended = <&spmi_bus 0x8 0xd7 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pmau0102_i_adc ADC5_GEN3_DIE_TEMP(8)>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmau0102_i_adc: adc@7200 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x7200>; + #address-cells = <1>; + #size-cells = <0>; + interrupts-extended = <&spmi_bus 0x8 0x72 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@800 { + reg = ; + label = "pmau0102_i_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@801 { + reg = ; + label = "pmau0102_i_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@803 { + reg = ; + label = "pmau0102_i_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + pmau0102_i_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_i_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_j: pmic@9 { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0x9 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_j_mbg_temp: temperature-sensor@d700 { + compatible = "qcom,pmau0102-mbg-tm", "qcom,pm8775-mbg-tm"; + reg = <0xd700>; + interrupts-extended = <&spmi_bus 0x9 0xd7 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pmau0102_j_adc ADC5_GEN3_DIE_TEMP(9)>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmau0102_j_adc: adc@7200 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x7200>; + #address-cells = <1>; + #size-cells = <0>; + interrupts-extended = <&spmi_bus 0x9 0x72 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@900 { + reg = ; + label = "pmau0102_j_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@901 { + reg = ; + label = "pmau0102_j_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@903 { + reg = ; + label = "pmau0102_j_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + pmau0102_j_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_j_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_k: pmic@a { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0xa SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_k_mbg_temp: temperature-sensor@d700 { + compatible = "qcom,pmau0102-mbg-tm", "qcom,pm8775-mbg-tm"; + reg = <0xd700>; + interrupts-extended = <&spmi_bus 0xa 0xd7 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pmau0102_k_adc ADC5_GEN3_DIE_TEMP(0xa)>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmau0102_k_adc: adc@7200 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x7200>; + #address-cells = <1>; + #size-cells = <0>; + interrupts-extended = <&spmi_bus 0xa 0x72 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@a00 { + reg = ; + label = "pmau0102_k_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@a01 { + reg = ; + label = "pmau0102_k_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@a03 { + reg = ; + label = "pmau0102_k_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + pmau0102_k_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_k_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_l: pmic@b { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0xb SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_l_mbg_temp: temperature-sensor@d700 { + compatible = "qcom,pmau0102-mbg-tm", "qcom,pm8775-mbg-tm"; + reg = <0xd700>; + interrupts-extended = <&spmi_bus 0xb 0xd7 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pmau0102_l_adc ADC5_GEN3_DIE_TEMP(0xb)>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmau0102_l_adc: adc@7200 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x7200>; + #address-cells = <1>; + #size-cells = <0>; + interrupts-extended = <&spmi_bus 0xb 0x72 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@b00 { + reg = ; + label = "pmau0102_l_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@b01 { + reg = ; + label = "pmau0102_l_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@b03 { + reg = ; + label = "pmau0102_l_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + pmau0102_l_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_l_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; + +/ { + thermal-zones { + pmau0102_e_thermal: pmau0102-e-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_e_mbg_temp>; + trips { + trip0 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + pmau0102_f_thermal: pmau0102-f-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_f_mbg_temp>; + trips { + trip0 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + pmau0102_g_thermal: pmau0102-g-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_g_mbg_temp>; + trips { + trip0 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + pmau0102_h_thermal: pmau0102-h-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_h_mbg_temp>; + trips { + trip0 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + pmau0102_i_thermal: pmau0102-i-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_i_mbg_temp>; + trips { + trip0 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + pmau0102_j_thermal: pmau0102-j-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_j_mbg_temp>; + trips { + trip0 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + pmau0102_k_thermal: pmau0102-k-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_k_mbg_temp>; + trips { + trip0 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + pmau0102_l_thermal: pmau0102-l-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_l_mbg_temp>; + trips { + trip0 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi b/arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi new file mode 100644 index 0000000000000..192a38ce15a5b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi @@ -0,0 +1,118 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include +#include +#include +#include "qcom-adc5-gen3.h" + +&spmi_bus { + kobra_mm_a: pmic@0 { + compatible = "qcom,pmm8650au", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + kobra_mm_a_pon: pon@1200 { + compatible = "qcom,pmk8350-pon"; + reg = <0x1200>, <0x800>; + reg-names = "hlos", "pbs"; + + kobra_mm_a_pon_pwrkey: pwrkey { + compatible = "qcom,pmk8350-pwrkey"; + interrupts-extended = <&spmi_bus 0x0 0x12 0x7 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + debounce = <15625>; + }; + + kobra_mm_a_pon_resin: resin { + compatible = "qcom,pmk8350-resin"; + interrupts-extended = <&spmi_bus 0x0 0x12 0x6 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + status = "disabled"; + }; + }; + + kobra_mm_a_rtc: rtc@6100 { + compatible = "qcom,pmk8350-rtc"; + reg = <0x6100>, <0x6200>; + reg-names = "rtc", "alarm"; + interrupts-extended = <&spmi_bus 0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>; + }; + + kobra_mm_a_adc: adc@8000 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x8000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts-extended = <&spmi_bus 0x0 0x80 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@0 { + reg = ; + label = "kobra_mm_a_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@1 { + reg = ; + label = "kobra_mm_a_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@3 { + reg = ; + label = "kobra_mm_a_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + kobra_mm_a_gpios: gpio@8800 { + compatible = "qcom,pmm8650au-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&kobra_mm_a_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + kobra_psail_b: pmic@1 { + compatible = "qcom,pmm8650au", "qcom,spmi-pmic"; + reg = <0x1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + kobra_psail_b_mbg_temp: temperature-sensor@d700 { + compatible = "qcom,pm8775-mbg-tm"; + reg = <0xd700>; + interrupts-extended = <&spmi_bus 0x1 0xd7 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&kobra_mm_a_adc ADC5_GEN3_DIE_TEMP(0)>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + }; +}; + +/ { + thermal-zones { + kobra_psail_b_thermal: kobra-psail-b-thermal { + polling-delay-passive = <100>; + + thermal-sensors = <&kobra_psail_b_mbg_temp>; + + trips { + trip0 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + }; +}; + From b175ac9ed43473bc922ce38d67a5bf7404402310 Mon Sep 17 00:00:00 2001 From: Dhruvin Rajpura Date: Fri, 21 Aug 2026 12:39:35 +0530 Subject: [PATCH 4/4] PENDING: arm64: configs: qcom: Enable ADC5 Gen3 and MBG thermal monitor Enable qcom,spmi-adc5-gen3 and qcom,pm8775-mbg-tm so the PMAU0102 and PMM8650AU MBG temperature sensors and their backing ADC channels are built into the Nord kernel image. Signed-off-by: Dhruvin Rajpura --- arch/arm64/configs/qcom.config | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/qcom.config b/arch/arm64/configs/qcom.config index b286309f0c251..99168262b889c 100644 --- a/arch/arm64/configs/qcom.config +++ b/arch/arm64/configs/qcom.config @@ -58,6 +58,8 @@ CONFIG_PROC_EVENTS=y CONFIG_QCA808X_PHY=m CONFIG_QCOM_QMI_COOLING=y CONFIG_QCOM_SPEL=m +CONFIG_QCOM_SPMI_ADC5_GEN3=m +CONFIG_QCOM_SPMI_MBG_TM=m CONFIG_QCOM_TGU=m CONFIG_REMOTEPROC_THERMAL=y CONFIG_SCHED_CLASS_EXT=y