From f42599c782033b7ae995a8ba52413225f660b22a Mon Sep 17 00:00:00 2001 From: Dhruvin Rajpura Date: Fri, 14 Aug 2026 14:08:12 +0530 Subject: [PATCH 1/3] pinctrl: qcom: spmi-gpio: add PMAU0102 and PMM8650AU compatibles Add SPMI GPIO compatible strings for the PMAU0102 and PMM8650AU PMICs used on Nord, each with 12 GPIOs, so the driver can bind against the new per-chip PMIC dtsi nodes. Signed-off-by: Dhruvin Rajpura --- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c index cdd61dae74cf9..167b212961f3d 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c @@ -1274,7 +1274,9 @@ static const struct of_device_id pmic_gpio_of_match[] = { { .compatible = "qcom,pmk8350-gpio", .data = (void *) 4 }, { .compatible = "qcom,pmk8550-gpio", .data = (void *) 6 }, { .compatible = "qcom,pmk8850-gpio", .data = (void *)8 }, + { .compatible = "qcom,pmau0102-gpio", .data = (void *) 12 }, { .compatible = "qcom,pmm8155au-gpio", .data = (void *) 10 }, + { .compatible = "qcom,pmm8650au-gpio", .data = (void *) 12 }, { .compatible = "qcom,pmm8654au-gpio", .data = (void *) 12 }, /* pmp8074 has 12 GPIOs with holes on 1 and 12 */ { .compatible = "qcom,pmp8074-gpio", .data = (void *) 12 }, From fbe32800ed55ad50126c459f341c50d7407854a6 Mon Sep 17 00:00:00 2001 From: Dhruvin Rajpura Date: Fri, 14 Aug 2026 14:08:30 +0530 Subject: [PATCH 2/3] arm64: dts: qcom: nord: add PMAU0102 and PMM8650AU PMIC support PMAU0102 and PMM8650AU are new PMICs used on nord-rrd and nord-ride-sx that are not present on lemans/monaco, so there is no existing dtsi to reuse. Add per-chip PMIC dtsi files (pmau0102-nord.dtsi, pmm8650au-nord.dtsi) with their peripheral definitions (temp-alarm, pon, rtc, gpio), matching the hardware-per-file convention used for other PMICs. Update the spmi_bus controller node in nord.dtsi accordingly and switch nord-rrd.dts/nord-ride-sx.dts to include the new per-chip dtsi files. Signed-off-by: Dhruvin Rajpura --- arch/arm64/boot/dts/qcom/nord-ride-sx.dts | 11 +- arch/arm64/boot/dts/qcom/nord-rrd.dts | 2 + arch/arm64/boot/dts/qcom/nord.dtsi | 4 +- arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi | 285 +++++++++++++++++++ arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi | 111 ++++++++ 5 files changed, 407 insertions(+), 6 deletions(-) create mode 100644 arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi create mode 100644 arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi diff --git a/arch/arm64/boot/dts/qcom/nord-ride-sx.dts b/arch/arm64/boot/dts/qcom/nord-ride-sx.dts index b6a3c9cc1a86b..f9fa0849e396a 100644 --- a/arch/arm64/boot/dts/qcom/nord-ride-sx.dts +++ b/arch/arm64/boot/dts/qcom/nord-ride-sx.dts @@ -9,7 +9,8 @@ #include #include "nord-embedded.dtsi" -#include "nord-pmics.dtsi" +#include "pmm8650au-nord.dtsi" +#include "pmau0102-nord.dtsi" / { model = "Qualcomm Technologies, Inc. Nord Ride SX"; @@ -74,7 +75,7 @@ regulator-name = "usb2_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - gpio = <&pmic_h_gpios 3 GPIO_ACTIVE_HIGH>; + gpio = <&pmau0102_h_gpios 3 GPIO_ACTIVE_HIGH>; enable-active-high; regulator-always-on; }; @@ -533,7 +534,7 @@ vdd1v8-supply = <&vreg_l3l_1p8>; - reset-gpios = <&pmic_i_gpios 9 GPIO_ACTIVE_LOW>; + reset-gpios = <&pmau0102_i_gpios 9 GPIO_ACTIVE_LOW>; }; usb1_repeater: redriver@4f { @@ -543,7 +544,7 @@ vdd1v8-supply = <&vreg_l3l_1p8>; - reset-gpios = <&pmic_i_gpios 10 GPIO_ACTIVE_LOW>; + reset-gpios = <&pmau0102_i_gpios 10 GPIO_ACTIVE_LOW>; }; usb2_repeater: redriver@47 { @@ -553,7 +554,7 @@ vdd1v8-supply = <&vreg_l3l_1p8>; - reset-gpios = <&pmic_l_gpios 3 GPIO_ACTIVE_LOW>; + reset-gpios = <&pmau0102_l_gpios 3 GPIO_ACTIVE_LOW>; }; }; diff --git a/arch/arm64/boot/dts/qcom/nord-rrd.dts b/arch/arm64/boot/dts/qcom/nord-rrd.dts index a2a19f2304fa1..263cf2eafecf1 100644 --- a/arch/arm64/boot/dts/qcom/nord-rrd.dts +++ b/arch/arm64/boot/dts/qcom/nord-rrd.dts @@ -9,6 +9,8 @@ #include #include "nord-embedded.dtsi" +#include "pmm8650au-nord.dtsi" +#include "pmau0102-nord.dtsi" / { model = "Qualcomm Technologies, Inc. IQ10 RRD"; diff --git a/arch/arm64/boot/dts/qcom/nord.dtsi b/arch/arm64/boot/dts/qcom/nord.dtsi index e17bd52dd8dea..ec7bc4a312847 100644 --- a/arch/arm64/boot/dts/qcom/nord.dtsi +++ b/arch/arm64/boot/dts/qcom/nord.dtsi @@ -1721,15 +1721,17 @@ reg = <0x0 0x0c400000 0x0 0x3000>, <0x0 0x0c500000 0x0 0x400000>, <0x0 0x0c440000 0x0 0x80000>, - <0x0 0x0c4c0000 0x0 0x20000>, + <0x0 0x0c4c0000 0x0 0x10000>, <0x0 0x0c42d000 0x0 0x4000>; reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; + cell-index = <0>; qcom,channel = <0>; qcom,ee = <0>; + qcom,bus-id = <0>; interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "periph_irq"; interrupt-controller; diff --git a/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi b/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi new file mode 100644 index 0000000000000..fe29071a4f789 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi @@ -0,0 +1,285 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include + +&spmi_bus { + pmau0102_e: pmic@4 { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0x4 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_e_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pmau0102_e_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_e_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_f: pmic@5 { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0x5 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_f_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x5 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pmau0102_f_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_f_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_g: pmic@6 { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0x6 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_g_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x6 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pmau0102_g_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_g_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_h: pmic@7 { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0x7 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_h_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x7 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pmau0102_h_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_h_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_i: pmic@8 { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0x8 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_i_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x8 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pmau0102_i_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_i_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_j: pmic@9 { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0x9 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_j_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x9 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pmau0102_j_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_j_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_k: pmic@a { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0xa SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_k_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0xa 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pmau0102_k_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_k_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_l: pmic@b { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0xb SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_l_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0xb 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pmau0102_l_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_l_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; + +/ { + thermal-zones { + pmau0102_e_thermal: pmau0102-e-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_e_temp_alarm>; + trips { + trip0 { temperature = <95000>; hysteresis = <0>; type = "passive"; }; + trip1 { temperature = <115000>; hysteresis = <0>; type = "hot"; }; + trip2 { temperature = <145000>; hysteresis = <0>; type = "critical"; }; + }; + }; + + pmau0102_f_thermal: pmau0102-f-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_f_temp_alarm>; + trips { + trip0 { temperature = <95000>; hysteresis = <0>; type = "passive"; }; + trip1 { temperature = <115000>; hysteresis = <0>; type = "hot"; }; + trip2 { temperature = <145000>; hysteresis = <0>; type = "critical"; }; + }; + }; + + pmau0102_g_thermal: pmau0102-g-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_g_temp_alarm>; + trips { + trip0 { temperature = <95000>; hysteresis = <0>; type = "passive"; }; + trip1 { temperature = <115000>; hysteresis = <0>; type = "hot"; }; + trip2 { temperature = <145000>; hysteresis = <0>; type = "critical"; }; + }; + }; + + pmau0102_h_thermal: pmau0102-h-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_h_temp_alarm>; + trips { + trip0 { temperature = <95000>; hysteresis = <0>; type = "passive"; }; + trip1 { temperature = <115000>; hysteresis = <0>; type = "hot"; }; + trip2 { temperature = <145000>; hysteresis = <0>; type = "critical"; }; + }; + }; + + pmau0102_i_thermal: pmau0102-i-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_i_temp_alarm>; + trips { + trip0 { temperature = <95000>; hysteresis = <0>; type = "passive"; }; + trip1 { temperature = <115000>; hysteresis = <0>; type = "hot"; }; + trip2 { temperature = <145000>; hysteresis = <0>; type = "critical"; }; + }; + }; + + pmau0102_j_thermal: pmau0102-j-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_j_temp_alarm>; + trips { + trip0 { temperature = <95000>; hysteresis = <0>; type = "passive"; }; + trip1 { temperature = <115000>; hysteresis = <0>; type = "hot"; }; + trip2 { temperature = <145000>; hysteresis = <0>; type = "critical"; }; + }; + }; + + pmau0102_k_thermal: pmau0102-k-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_k_temp_alarm>; + trips { + trip0 { temperature = <95000>; hysteresis = <0>; type = "passive"; }; + trip1 { temperature = <115000>; hysteresis = <0>; type = "hot"; }; + trip2 { temperature = <145000>; hysteresis = <0>; type = "critical"; }; + }; + }; + + pmau0102_l_thermal: pmau0102-l-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_l_temp_alarm>; + trips { + trip0 { temperature = <95000>; hysteresis = <0>; type = "passive"; }; + trip1 { temperature = <115000>; hysteresis = <0>; type = "hot"; }; + trip2 { temperature = <145000>; hysteresis = <0>; type = "critical"; }; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi b/arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi new file mode 100644 index 0000000000000..f24ecc34d533d --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include +#include +#include + +&spmi_bus { + kobra_mm_a: pmic@0 { + compatible = "qcom,pmm8650au", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + kobra_mm_a_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x0 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + kobra_mm_a_pon: pon@1200 { + compatible = "qcom,pmk8350-pon"; + reg = <0x1200>, <0x800>; + reg-names = "hlos", "pbs"; + + kobra_mm_a_pon_pwrkey: pwrkey { + compatible = "qcom,pmk8350-pwrkey"; + interrupts-extended = <&spmi_bus 0x0 0x12 0x7 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + debounce = <15625>; + }; + + kobra_mm_a_pon_resin: resin { + compatible = "qcom,pmk8350-resin"; + interrupts-extended = <&spmi_bus 0x0 0x12 0x6 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + status = "disabled"; + }; + }; + + kobra_mm_a_rtc: rtc@6100 { + compatible = "qcom,pmk8350-rtc"; + reg = <0x6100>, + <0x6200>; + reg-names = "rtc", + "alarm"; + interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>; + }; + + kobra_mm_a_gpios: gpio@8800 { + compatible = "qcom,pmm8650au-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&kobra_mm_a_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + kobra_psail_b: pmic@1 { + compatible = "qcom,pmm8650au", "qcom,spmi-pmic"; + reg = <0x1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + kobra_psail_b_gpios: gpio@8800 { + compatible = "qcom,pmm8650au-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&kobra_psail_b_gpios 0 0 2>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; + +/ { + thermal-zones { + kobra_mm_a_thermal: kobra-a-thermal { + polling-delay-passive = <100>; + + thermal-sensors = <&kobra_mm_a_temp_alarm>; + + trips { + trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "hot"; + }; + + trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; +}; From 921efe268ab7cad765ed1c81da464d0487b285c8 Mon Sep 17 00:00:00 2001 From: Dhruvin Rajpura Date: Mon, 17 Aug 2026 16:17:18 +0530 Subject: [PATCH 3/3] arm64: dts: qcom: nord: Add ADC channels for PMAU0102 and PMM8650AU Add REF_GND, 1P25VREF, VREF_VADC and DIE_TEMP ADC5 Gen3 channels for all PMAU0102 PMIC instances (pmau0102_e through pmau0102_l) and both PMM8650AU PMIC instances (kobra_mm_a and kobra_psail_b), following the existing adc@8000 node convention used for other PMICs in this tree. Signed-off-by: Dhruvin Rajpura --- arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi | 265 +++++++++++++++++++ arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi | 67 +++++ 2 files changed, 332 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi b/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi index fe29071a4f789..19f4c69f0d780 100644 --- a/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi +++ b/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi @@ -5,6 +5,7 @@ #include #include +#include "qcom-adc5-gen3.h" &spmi_bus { pmau0102_e: pmic@4 { @@ -20,6 +21,39 @@ #thermal-sensor-cells = <0>; }; + pmau0102_e_adc: adc@8000 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x8000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x4 0x80 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@400 { + reg = ; + label = "pmau0102_e_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@401 { + reg = ; + label = "pmau0102_e_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@402 { + reg = ; + label = "pmau0102_e_vref_vadc"; + qcom,pre-scaling = <1 1>; + }; + + channel@403 { + reg = ; + label = "pmau0102_e_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + pmau0102_e_gpios: gpio@8800 { compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; reg = <0x8800>; @@ -44,6 +78,39 @@ #thermal-sensor-cells = <0>; }; + pmau0102_f_adc: adc@8000 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x8000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x5 0x80 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@500 { + reg = ; + label = "pmau0102_f_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@501 { + reg = ; + label = "pmau0102_f_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@502 { + reg = ; + label = "pmau0102_f_vref_vadc"; + qcom,pre-scaling = <1 1>; + }; + + channel@503 { + reg = ; + label = "pmau0102_f_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + pmau0102_f_gpios: gpio@8800 { compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; reg = <0x8800>; @@ -68,6 +135,39 @@ #thermal-sensor-cells = <0>; }; + pmau0102_g_adc: adc@8000 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x8000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x6 0x80 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@600 { + reg = ; + label = "pmau0102_g_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@601 { + reg = ; + label = "pmau0102_g_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@602 { + reg = ; + label = "pmau0102_g_vref_vadc"; + qcom,pre-scaling = <1 1>; + }; + + channel@603 { + reg = ; + label = "pmau0102_g_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + pmau0102_g_gpios: gpio@8800 { compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; reg = <0x8800>; @@ -92,6 +192,39 @@ #thermal-sensor-cells = <0>; }; + pmau0102_h_adc: adc@8000 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x8000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x7 0x80 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@700 { + reg = ; + label = "pmau0102_h_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@701 { + reg = ; + label = "pmau0102_h_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@702 { + reg = ; + label = "pmau0102_h_vref_vadc"; + qcom,pre-scaling = <1 1>; + }; + + channel@703 { + reg = ; + label = "pmau0102_h_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + pmau0102_h_gpios: gpio@8800 { compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; reg = <0x8800>; @@ -116,6 +249,39 @@ #thermal-sensor-cells = <0>; }; + pmau0102_i_adc: adc@8000 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x8000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x8 0x80 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@800 { + reg = ; + label = "pmau0102_i_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@801 { + reg = ; + label = "pmau0102_i_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@802 { + reg = ; + label = "pmau0102_i_vref_vadc"; + qcom,pre-scaling = <1 1>; + }; + + channel@803 { + reg = ; + label = "pmau0102_i_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + pmau0102_i_gpios: gpio@8800 { compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; reg = <0x8800>; @@ -140,6 +306,39 @@ #thermal-sensor-cells = <0>; }; + pmau0102_j_adc: adc@8000 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x8000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x9 0x80 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@900 { + reg = ; + label = "pmau0102_j_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@901 { + reg = ; + label = "pmau0102_j_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@902 { + reg = ; + label = "pmau0102_j_vref_vadc"; + qcom,pre-scaling = <1 1>; + }; + + channel@903 { + reg = ; + label = "pmau0102_j_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + pmau0102_j_gpios: gpio@8800 { compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; reg = <0x8800>; @@ -164,6 +363,39 @@ #thermal-sensor-cells = <0>; }; + pmau0102_k_adc: adc@8000 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x8000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0xa 0x80 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@a00 { + reg = ; + label = "pmau0102_k_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@a01 { + reg = ; + label = "pmau0102_k_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@a02 { + reg = ; + label = "pmau0102_k_vref_vadc"; + qcom,pre-scaling = <1 1>; + }; + + channel@a03 { + reg = ; + label = "pmau0102_k_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + pmau0102_k_gpios: gpio@8800 { compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; reg = <0x8800>; @@ -188,6 +420,39 @@ #thermal-sensor-cells = <0>; }; + pmau0102_l_adc: adc@8000 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x8000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0xb 0x80 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@b00 { + reg = ; + label = "pmau0102_l_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@b01 { + reg = ; + label = "pmau0102_l_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@b02 { + reg = ; + label = "pmau0102_l_vref_vadc"; + qcom,pre-scaling = <1 1>; + }; + + channel@b03 { + reg = ; + label = "pmau0102_l_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + pmau0102_l_gpios: gpio@8800 { compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; reg = <0x8800>; diff --git a/arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi b/arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi index f24ecc34d533d..72b26aad9bc9f 100644 --- a/arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi +++ b/arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi @@ -7,6 +7,7 @@ #include #include #include +#include "qcom-adc5-gen3.h" &spmi_bus { kobra_mm_a: pmic@0 { @@ -51,6 +52,39 @@ interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>; }; + kobra_mm_a_adc: adc@8000 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x8000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x0 0x80 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@0 { + reg = ; + label = "kobra_mm_a_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@1 { + reg = ; + label = "kobra_mm_a_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@2 { + reg = ; + label = "kobra_mm_a_vref_vadc"; + qcom,pre-scaling = <1 1>; + }; + + channel@3 { + reg = ; + label = "kobra_mm_a_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + kobra_mm_a_gpios: gpio@8800 { compatible = "qcom,pmm8650au-gpio", "qcom,spmi-gpio"; reg = <0x8800>; @@ -68,6 +102,39 @@ #address-cells = <1>; #size-cells = <0>; + kobra_psail_b_adc: adc@8000 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x8000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x1 0x80 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@100 { + reg = ; + label = "kobra_psail_b_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@101 { + reg = ; + label = "kobra_psail_b_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@102 { + reg = ; + label = "kobra_psail_b_vref_vadc"; + qcom,pre-scaling = <1 1>; + }; + + channel@103 { + reg = ; + label = "kobra_psail_b_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + kobra_psail_b_gpios: gpio@8800 { compatible = "qcom,pmm8650au-gpio", "qcom,spmi-gpio"; reg = <0x8800>;