Enable TC tiling on SparseCore and use num_lanes for row_subchunk_size.

[BirdsOfAFthr]

Description

This PR enables Tensor Core (TC) tiling on SparseCore within the Pallas gather-reduce kernel and dynamically resolves the number of cores and lanes instead of using hardcoded values.

Tests

• Ran tests/gather_reduce_sc_test.py locally

Checklist

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[codecov]

Codecov Report

❌ Patch coverage is 0% with 1 line in your changes missing coverage. Please review.

Files with missing lines	Patch %	Lines
src/maxtext/kernels/gather_reduce_pallas.py	0.00%	1 Missing ⚠️

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