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add core::arch::{x86, x86_64}::x87_f80 - #163992
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Some changes occurred in compiler/rustc_attr_ir cc @jdonszelmann, @JonathanBrouwer
cc @bjorn3 Some changes occurred to the CTFE / Miri interpreter cc @rust-lang/miri Some changes occurred to the CTFE machinery This PR changes rustc_public cc @oli-obk, @celinval, @ouz-a, @makai410
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@bors try jobs=test-various,test-i686-* |
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add `core::arch::{x86, x86_64}::x87_f80`
try-job: test-various
try-job: test-i686-*
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"f80" is 128 bits large on 64-bit targets...?!?? How does that make any sense?
I'd be surprised if we didn't. That's been pretty much part of the definition of being a scalar -- if a type has padding, it is not a scalar type. The interpreter was built around that assumption. It does not sound to me like this type can be a scalar, then. |
| // For `x87_f80` the primitive is 80 bits, but the field (after rounding up to | ||
| // the alignment) is 12 bytes (on 32-bit systems) or 16 bytes (64-bit). | ||
| // So we can't assert equality of size and layout.size. | ||
| assert_eq!( | ||
| size.align_to(s.default_align(self).abi), | ||
| mplace.layout.size, | ||
| "abi::Scalar is larger than its layout" | ||
| ); |
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The entire logic for dealing with scalars throughout the interpreter assumes that they have no padding. Changing this assertion is not enough, it just means the rest of the interpreter is now more or less silently wrong. Pretty much all codepaths that deal with scalars need to be audited. Same for every other MIR consumer.
I would strongly prefer if we didn't break the fundamental concept of a "scalar".
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To give just one example, here's one place we make that assumption:
rust/compiler/rustc_const_eval/src/interpret/place.rs
Lines 792 to 794 in 6aaabbb
You can't even see it. But if you look at the ScalarPair path you can see that we have to ensure that padding gets reset to uninit, and in the Scalar path we don't have to worry about that.
Also, the basic APIs for reading/writing stuff in an Allocation are read_scalar/write_scalar. This again uses the term "scalar" to refer to something that has no padding. Same for the type Scalar. And so on.
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It would probably be possible, with a lot of effort, to fix all the places where we assume scalars have no padding. But I think that's a bad idea. It makes life harder for every MIR consumer. (Most likely it'll mean many MIR consumers will stay buggy as nobody will expect something as outlandish as this weird type.) This new type is the weird one here, we should not shape everything around a legacy type that hardly anyone needs and that has no justification to exist in the first place other than "it has always been here". |
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I think it might make sense to introduce something like |
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For Rust's purposes could we just pretend it's a |
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Without it, reads are reported as UB because the tracking of what bytes are initialized is incorect
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This PR was rebased onto a different main commit. Here's a range-diff highlighting what actually changed. Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers. |
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@bors r=beetrees,RalfJung |
…ees,RalfJung
add `core::arch::{x86, x86_64}::x87_f80`
tracking issue: rust-lang#163982
cc rust-lang#161787
Add `x87_f80` in the same way as `f16b` and `ppcf128`.
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It's unclear what to do with this type on softfloat targets. Clang and GCC reject the type when the x87 registers are not available. We should do the same, probably just with a `cfg`?
I don't think we have a good `cfg` for this though? `x87` is still set on softfloat targets, while `soft-float` doesn't get set (that does not give a warning even, it probably should?). We also don't set `cfg_abi`.
### future work
- the ABI of `Complex<x87_f80>` has not yet been implemented
- `x87_f80` does not yet implement `VaArgSafe`
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Note This PR was benchmarked as part of triage of its containing rollup: triage URL. Finished benchmarking commit (ff26eab): comparison URL. Overall result: ❌✅ regressions and improvements - please read:Our benchmarks found a performance regression caused by this PR. Next Steps:
@rustbot label: +perf-regression Instruction countOur most reliable metric. Used to determine the overall result above. However, even this metric can be noisy.
Max RSS (memory usage)Results (primary 2.1%)A less reliable metric. May be of interest, but not used to determine the overall result above.
CyclesThis perf run didn't have relevant results for this metric. Binary sizeThis perf run didn't have relevant results for this metric. Artifact size: 406.28 MiB -> 406.35 MiB (0.02%) |
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tracking issue: #163982
cc #161787
Add
x87_f80in the same way asf16bandppcf128.It's unclear what to do with this type on softfloat targets. Clang and GCC reject the type when the x87 registers are not available. We should do the same, probably just with a
cfg?I don't think we have a good
cfgfor this though?x87is still set on softfloat targets, whilesoft-floatdoesn't get set (that does not give a warning even, it probably should?). We also don't setcfg_abi.future work
Complex<x87_f80>has not yet been implementedx87_f80does not yet implementVaArgSafe